人工智能
人工智能
通过先进的测试解决方案推动人工智能领域的创新
泰瑞达是您值得信赖的合作伙伴，我们先进的自动化测试设备 (ATE) 可以帮助您快速引入新设备、改进良率并提高硅芯片性能，进而满足新一代 AI 设备不断增长的需求。
我们赢得了 AI 客户的信赖
泰瑞达帮助领先的创新企业部署先进的测试能力，以便快速引入新的 AI 芯片、改进良率并提高硅芯片的性能。
泰瑞达在 UltraFLEX 系列测试设备上提供板卡
UltraFLEX 系列
用于保障 64 位中央处理器 (CPU)、TB 级磁盘驱动器组件、应用程序处理器 (AP)、移动电源管理、安全元件以及其它复杂 SoC 设备的质量测试、产能和快速上市时间。
全新的高性能第三代板卡套装
全新的高性能第三代板卡套装
- UltraPin2200 – 下一代数字板卡
- 高密度，每个板卡搭载 512 个通道
- 每个板卡搭载 32 个向量发生器，可为每个工位，提供并发测试的能力，也可以提供独立的向量。
- 适用于非确定性数据测试的专用内存
- 最高达 16Gbit Scan测试容量，采用灵活的向量存储架构
- 跨工位数据共享
UVS256-HP – 高密度、高灵活性的通用电源板卡
- 每个板卡搭载 256 个通道
- 灵活的合并能力
- 卓越的动态性能
- 低噪声
- 可提供并测量四象限电压或电流
UVS256-HP – 高密度、高灵活性的通用电源板卡
- 每个板卡搭载 256 个通道
- 灵活的合并能力
- 卓越的动态性能
- 低噪声
- 可提供并测量四象限电压或电流
UltraPAC300 – next generation high density analog instrument
- High performance audio and baseband AC instrument
- Coverage up to 300MHz
- Dual mode high speed and high-resolution channels
UltraSerial60G – the first ATE solution for testing 60Gbps high-speed device that supports all generations of PCIe standards (PCIe/4/5/6: 16Gbps NRZ / 32Gbps NRZ / 56Gbps PAM4) and beyond.
- 32 differential transmitters and 32 differential receivers capable of generating and measuring up to 32Gbps NRZ data and up to 60 Gbps PAM4 waveforms
- independent 25GHz bandwidth digitizer that allows bench-top test quality with no additional Device Interface Board (DIB) circuitry
- Single insertion testing of high speed serial interface and all other device functions including RF capability
UltraSerial10G – this high speed serial instrument can test expanding serial bus technologies and replicates the device operating environment for optimal test quality at device limited test time with the highest possible throughput.
- 20 differential Drive and Receive ports (40 channels/80 wires) per board
- Frequency range of 42Mbps to 10.7Gbps with 426M drive/compare, and 1Gig capture memory
- DC parametric measurement hardware
- Receiver alignment (clock data recovery) for timing & data uncertainty
- Instrument loopback
- Pseudo-random bit stream (PRBS) hardware
- Hardware that provides jitter injection and jitter eye/measurements
- All of these features are designed to provide an efficient test methodology for SerDes bus testing
- Protocol Aware testing support for PCIe
即将举行的网络研讨会
往期网络研讨会
June 9, 2020
10:00 am EDT
LinkedIn Live: Serial Scan
Join Strategic Product Marketing leader for Cloud & AI, Sam Rosen, as he answers questions about serial scan and addresses Teradyne’s approach during this short webinar.
June 25, 2020
10:00 am ET
LinkedIn Live: Challenges of High Power Processor and ASIC Testing
Join Principal Technologist Ken Lanier as he answers questions and discusses the challenges associated with testing the newest Processors and ASIC devices that can have Power Supply requirements of many hundreds of amps in a high volume manufacturing environment.
July 16, 2020
10:00 am EDT
LinkedIn Live: New Approaches for Managing Complexity in IP Debug
Join Marc Hutner for the third LinkedIn Live in our Teradyne Live Series.