HSSub-6100
12G IO Expansion Instrument
Highest Speed for Multiple Optical Serial Buses with FPGA Configurability
Best choice when current or future requirements include:
- Optical serial ports to 12.5Gb/s
- Multiple concurrently operating buses
- FPGA configurability to address a variety of low-level bus specifications
- High bandwidth and memory capacity coupled with predictable low latency interactions
- Up to 8 bidirectional optical ports for multiple concurrent serial buses, multi-lane buses, and fiber configuration flexibility
- Flexible low-level HSSub Tier 1 I/O Bus Processing
- Reconfigurable HSSub Tier 1 (I/O Bus Processing) of the HSSub Three Tier Architecture implemented by a large Test Defined FPGA and local memory
- Configured in seconds by HSSub Apps supported by Teradyne, end-users, and third-party developers
- HSSub App development, if required, is simplified by FPGA template code based on standard design patterns
- HSSub TriFlex Infrastructure Software interfaces provide access to the hardware from Windows Tier 3 or HSSub Tier 2 instruments
- Instrument is accessible by interfaces on both the Tier 3 Windows computer and Tier 2 RT Processors for Upper Level Protocol processing
